On 17/01/2026 15:36, David Heidelberg via B4 Relay wrote:
From: Luca Weiss <[email protected]>

Add a PHY configuration sequence for the sm8250 which uses a Qualcomm
Gen 2 version 1.2.1 CSI-2 PHY.

The PHY can be configured as two phase or three phase in C-PHY or D-PHY
mode. This configuration supports three-phase C-PHY mode.

Signed-off-by: Luca Weiss <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: David Heidelberg <[email protected]>
---
  .../platform/qcom/camss/camss-csiphy-3ph-1-0.c     | 110 ++++++++++++++++++++-
  1 file changed, 109 insertions(+), 1 deletion(-)

diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c 
b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index f819472511823..d82a88dad74b5 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -548,6 +548,111 @@ csiphy_lane_regs lane_regs_qcm2290[] = {
        {0x0664, 0x3f, 0x00, CSIPHY_DEFAULT_PARAMS},
  };
+/* GEN2 1.2.1 3PH */
+/* 3 entries: 3 lanes (C-PHY) */
+static const struct
+csiphy_lane_regs lane_regs_sm8250_3ph[] = {
+       {0x0990, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0994, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0998, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0990, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0994, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0998, 0x1a, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x098c, 0xaf, 0x01, CSIPHY_DEFAULT_PARAMS},
+       {0x015c, 0x46, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0168, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0104, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x010c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+       {0x0108, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
+       {0x0114, 0x20, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0150, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0188, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x018c, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0190, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0118, 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x011c, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0120, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0124, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0128, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x012c, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0160, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x01cc, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x01dc, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0984, 0x20, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0988, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0980, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x09ac, 0x35, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x09b0, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0800, 0x0e, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a90, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a98, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a90, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a94, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a98, 0x1a, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a8c, 0xaf, 0x01, CSIPHY_DEFAULT_PARAMS},
+       {0x035c, 0x46, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0368, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0304, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x030c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+       {0x0308, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
+       {0x0314, 0x20, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0350, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0388, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x038c, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0390, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0318, 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x031c, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0320, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0324, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0328, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x032c, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0360, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x03cc, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x03dc, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a84, 0x20, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a88, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0a80, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0aac, 0x35, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0ab0, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0800, 0x0e, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b90, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b98, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b90, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b94, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b98, 0x1a, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b8c, 0xaf, 0x01, CSIPHY_DEFAULT_PARAMS},
+       {0x055c, 0x46, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0568, 0xa0, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0504, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x050c, 0x12, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+       {0x0508, 0x00, 0x00, CSIPHY_SETTLE_CNT_HIGHER_BYTE},
+       {0x0514, 0x20, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0550, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0588, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x058c, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0590, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0518, 0x3e, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x051c, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0520, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0524, 0x7f, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0528, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x052c, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0560, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x05cc, 0x41, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x05dc, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b84, 0x20, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b88, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0b80, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0bac, 0x35, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0bb0, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0800, 0x0e, 0x00, CSIPHY_DEFAULT_PARAMS},
+       {0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+};
+
  /* GEN2 2.1.2 2PH DPHY mode */
  static const struct
  csiphy_lane_regs lane_regs_sm8550[] = {
@@ -1132,7 +1237,10 @@ static int csiphy_lanes_enable(struct csiphy_device 
*csiphy,
                break;
        case CAMSS_7280:
        case CAMSS_8250:
-               { /* V4L2_MBUS_CSI2_DPHY */
+               if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+                       regs->lane_regs = &lane_regs_sm8250_3ph[0];
+                       regs->lane_array_size = 
ARRAY_SIZE(lane_regs_sm8250_3ph);
+               } else { /* V4L2_MBUS_CSI2_DPHY */
                        regs->lane_regs = &lane_regs_sm8250[0];
                        regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8250);
                }


Glorious, two PHY init sequences in the one go. It feels like an analog to my birthday.

BOD makes technology jokes.

Please fixup the comment in the code per previous patch comment.

Then.

Reviewed-by: Bryan O'Donoghue <[email protected]>

---
bod

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