From: Peng Fan <[email protected]>
Cortex-M[7,33] processors use a fixed reset vector table format:
0x00 Initial SP value
0x04 Reset vector
0x08 NMI
0x0C ...
...
IRQ[n]
In ELF images, the corresponding layout is:
reset_vectors: --> hardware reset address
.word __stack_end__
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
...
.word UART_IRQHandler
.word SPI_IRQHandler
...
Reset_Handler: --> ELF entry point address
...
The hardware fetches the first two words from reset_vectors and populates
SP with __stack_end__ and PC with Reset_Handler. Execution proceeds from
Reset_Handler.
However, the ELF entry point does not always match the hardware reset
address. For example, on i.MX94 CM33S:
ELF entry point: 0x0ffc211d
CM33S hardware reset base: 0x0ffc0000
To derive the correct hardware reset address, the unused lower bits must
be masked off. The boot code should apply a SoC‑specific mask before
programming the reset address registers, e.g.:
reset_address = entry & reset-vector-mask
This reset address derivation method is also applicable to i.MX8M
Cortex-M7/4 cores.
Introduces the optional DT property `fsl,reset-vector-mask` to specify the
mask used for deriving the hardware reset address from
the ELF entry point.
Signed-off-by: Peng Fan <[email protected]>
---
Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
index
ce8ec0119469c8fc0979a192b6e3d3a03108d7d2..683f0c36293c08616621daa79c0b8914b0f48bba
100644
--- a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
+++ b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml
@@ -85,6 +85,12 @@ properties:
This property is to specify the resource id of the remote processor in
SoC
which supports SCFW
+ fsl,reset-vector-mask:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ This property is to specify the reset vector mask which is used
+ to mask off unused bits from ELF entry address.
+
required:
- compatible
--
2.37.1
