On 28/04/2026 10:47, Erikas Bitovtas wrote:


On 4/28/26 10:10 AM, Bryan O'Donoghue wrote:
On 27/04/2026 18:58, Erikas Bitovtas wrote:
+            video-decoder {
+                compatible = "venus-decoder";
+                clocks = <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
+                     <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
+                clock-names = "core0", "core1";
+                power-domains = <&gcc VENUS_CORE0_GDSC>,
+                        <&gcc VENUS_CORE1_GDSC>;
+                power-domain-names = "core0", "core1";
+            };
+
+            video-encoder {
+                compatible = "venus-encoder";
+                clocks = <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
+                     <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
+                clock-names = "core0", "core1";
+                power-domains = <&gcc VENUS_CORE0_GDSC>,
+                        <&gcc VENUS_CORE1_GDSC>;
+                power-domain-names = "core0", "core1";
+            };

So to be fair in this case you do have a reason to have an encoder and
decoder compatible here _but_ it should be the case that one one of the
sub-devices contains CORE0 related stuff and the other CORE1 related stuff.

Because in that case the sub-devices actually represent individual
hardware settings.

So listing power-domains and clocks for both cores in each node like
this militates against that.

The other thing is to double check of the encoder and decoder are inter-
changable here i.e. can either core be encoder or decoder or is it fixed ?

I believe on older generations - perhaps not on 8939 it is not
interchangable.

I found this in LA.BR.1.2.9.1_rb1.5:
https://github.com/msm8916-mainline/linux-downstream/blob/b20608408caff817ec874f325127b07609fbaeb8/arch/arm/boot/dts/qcom/msm8939-common.dtsi#L1589
Only decoder bits are being set in bus configs. This suggests that the
cores are not interchangeable.
Then again, I never managed to get encoding working on MSM8939. Testing
it with
gst-launch-1.0 videotestsrc ! videoconvert ! v4l2vp8enc ! queue !
v4l2vp8dec ! xvimagesink
Fails with the following log: https://pastebin.com/nmZcLgPV
And in dmesg it reports a firmware error:
[  784.461031] qcom-venus 1d00000.video-codec: no valid instance(pkt
session_id:dead, pkt:21001)
[  784.461126] qcom-venus-decoder 1d00000.video-codec:video-decoder:
dec: event session error 0
[  784.461200] qcom-venus-encoder 1d00000.video-codec:video-encoder:
enc: event session error 0
[  784.468799] qcom-venus 1d00000.video-codec: SFR message from FW:
QC_IMAGE_VERSION_STRING=VIDEO.VE.1.8-00099, Err_Fatal -
Z:\b\venus\utils\src\vbuffer.c:1319:
[  785.791641] qcom-venus 1d00000.video-codec: System error has
occurred, recovery failed to init HFI
[  787.018339] qcom-venus 1d00000.video-codec: System error has
occurred, recovery failed to init HFI
[  787.097253] qcom-venus 1d00000.video-codec: system error has occurred
(recovered)
This happens regardless of whether I enable the cores for encoding too
or not. The same errors were happening on MSM8916 as well. So I can't
tell if these cores are interchangeable just by testing.

Right so if you swap around the definition of which core is encoder and which decoder do you get the same or different result ?

i.e. is it because you are trying to get encoder running generally or because of the core you are doing it on ?

How about declaring both cores a decoder ?

---
bod

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