On Thu, 07 May 2026 22:36:15 -0700, Changhuang Liang wrote: > Add bindings for the System-0 clocks and reset generator (SYS0CRG) on > JHB100 SoC. > > Signed-off-by: Changhuang Liang <[email protected]> > --- > .../clock/starfive,jhb100-sys0crg.yaml | 63 +++++++++++++++++++ > .../dt-bindings/clock/starfive,jhb100-crg.h | 56 +++++++++++++++++ > .../dt-bindings/reset/starfive,jhb100-crg.h | 28 +++++++++ > 3 files changed, 147 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/clock/starfive,jhb100-sys0crg.yaml > create mode 100644 include/dt-bindings/clock/starfive,jhb100-crg.h > create mode 100644 include/dt-bindings/reset/starfive,jhb100-crg.h >
Reviewed-by: Rob Herring (Arm) <[email protected]>
