mhonap@ wrote: > From: Manish Honap <[email protected]> > > cxl_probe_component_regs() finds the HDM decoder block during device > probe and caches its location, but does not record the decoder count > and does not expose the result outside drivers/cxl/. > > In-kernel cxl drivers (Type-2 accelerator drivers, vfio-cxl) need the > decoder count and the byte offset and size of the HDM block without > re-running the probe sequence. > > Record decoder_cnt in rmap->count when parsing the HDM capability in > cxl_probe_component_regs(), extend struct cxl_reg_map with a count > member, and add cxl_get_hdm_info() to return offset, size, and count > from the cached map. Export under the CXL namespace. > > Signed-off-by: Manish Honap <[email protected]> > --- > drivers/cxl/core/pci.c | 33 +++++++++++++++++++++++++++++++++ > drivers/cxl/core/regs.c | 1 + > include/cxl/cxl.h | 4 ++++ > 3 files changed, 38 insertions(+) > > diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c > index 2bcd683aa286..c917608c16f9 100644 > --- a/drivers/cxl/core/pci.c > +++ b/drivers/cxl/core/pci.c > @@ -449,6 +449,39 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, > struct cxl_hdm *cxlhdm, > } > EXPORT_SYMBOL_NS_GPL(cxl_hdm_decode_init, "CXL"); > > +/** > + * cxl_get_hdm_info - Get HDM decoder register block location and count > + * @cxlds: CXL device state (must have component regs enumerated via > + * cxl_probe_component_regs()) > + * @count: number of HDM decoders (from HDM Capability bits [3:0]) > + * @offset: byte offset of HDM decoder block within the component register > BAR > + * @size: size in bytes of the HDM decoder block > + * > + * Exported for cxl drivers (in-kernel accelerator drivers, vfio-cxl) that > + * need HDM decoder metadata from the cached component-register map without > + * re-running the probe sequence. > + * > + * Return: 0 on success. -ENODEV if the HDM decoder block is not present. > + */ > +int cxl_get_hdm_info(struct cxl_dev_state *cxlds, u8 *count, > + resource_size_t *offset, resource_size_t *size) > +{ > + struct cxl_reg_map *hdm = &cxlds->reg_map.component_map.hdm_decoder; > + > + if (WARN_ON(!count || !offset || !size)) > + return -EINVAL; > + > + if (!hdm->valid) > + return -ENODEV; > + > + *count = hdm->count; > + *offset = hdm->offset; > + *size = hdm->size; > + > + return 0; > +} > +EXPORT_SYMBOL_NS_GPL(cxl_get_hdm_info, "CXL");
This is the same information that the CXL reset patches need to cache on the PCI device. Effectively this level of CXL information deserves to be as accessible as PCI BAR information, and should not need cxl_dev_state context to fetch it. So it would be good to depend on that rather than invent a new export mechanism.
