At present when exiting from idle we do not fully reinitialise ZCR_EL1, we update ZCR_EL1.LEN with a read/modify/write cycle when loading task state but never set any of the other bits to an explicit value. Since currently they are all architecturally RES0 or RAZ/WI this is not a practical issue but it may become one if further fields are defined in the register so we should explicitly configure the whole register.
Rename the existing sme_suspend_exit() (which handles this for SME) to fpsimd_suspend_exit() and add set ZCR_EL1 to 0 there, if needed LEN will be updated when loading task state. Signed-off-by: Mark Brown <[email protected]> --- arch/arm64/include/asm/fpsimd.h | 4 ++-- arch/arm64/kernel/fpsimd.c | 24 +++++++++++++----------- arch/arm64/kernel/suspend.c | 2 +- 3 files changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h index a67d5774e672..e13a85320ab6 100644 --- a/arch/arm64/include/asm/fpsimd.h +++ b/arch/arm64/include/asm/fpsimd.h @@ -364,6 +364,8 @@ extern void cpu_enable_sme2(const struct arm64_cpu_capabilities *__unused); extern void cpu_enable_fa64(const struct arm64_cpu_capabilities *__unused); extern void cpu_enable_fpmr(const struct arm64_cpu_capabilities *__unused); +extern void fpsimd_suspend_exit(void); + /* * Helpers to translate bit indices in sve_vq_map to VQ values (and * vice versa). This allows find_next_bit() to be used to find the @@ -623,7 +625,6 @@ static inline unsigned int sme_get_vl(void) extern void sme_alloc(struct task_struct *task, bool flush); extern int sme_set_current_vl(unsigned long arg); extern int sme_get_current_vl(void); -extern void sme_suspend_exit(void); static inline size_t __sme_state_size(unsigned int sme_vl) { @@ -779,7 +780,6 @@ static inline int sme_max_vl(void) { return 0; } static inline int sme_max_virtualisable_vl(void) { return 0; } static inline int sme_set_current_vl(unsigned long arg) { return -EINVAL; } static inline int sme_get_current_vl(void) { return -EINVAL; } -static inline void sme_suspend_exit(void) { } static inline size_t __sme_state_size(unsigned int sme_vl) { diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index e7f1682a3059..78c9d8dab545 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -1279,24 +1279,26 @@ void __init sme_setup(void) get_sme_default_vl()); } -void sme_suspend_exit(void) +#endif /* CONFIG_ARM64_SME */ + +void fpsimd_suspend_exit(void) { u64 smcr = 0; - if (!system_supports_sme()) - return; + if (system_supports_sve()) + write_sysreg_s(0, SYS_ZCR_EL1); - if (system_supports_fa64()) - smcr |= SMCR_ELx_FA64; - if (system_supports_sme2()) - smcr |= SMCR_ELx_EZT0; + if (system_supports_sme()) { + if (system_supports_fa64()) + smcr |= SMCR_ELx_FA64; + if (system_supports_sme2()) + smcr |= SMCR_ELx_EZT0; - write_sysreg_s(smcr, SYS_SMCR_EL1); - write_sysreg_s(0, SYS_SMPRI_EL1); + write_sysreg_s(smcr, SYS_SMCR_EL1); + write_sysreg_s(0, SYS_SMPRI_EL1); + } } -#endif /* CONFIG_ARM64_SME */ - /* * Trapped SVE access * diff --git a/arch/arm64/kernel/suspend.c b/arch/arm64/kernel/suspend.c index eaaff94329cd..e02728d14e0d 100644 --- a/arch/arm64/kernel/suspend.c +++ b/arch/arm64/kernel/suspend.c @@ -81,7 +81,7 @@ void notrace __cpu_suspend_exit(void) */ spectre_v4_enable_mitigation(NULL); - sme_suspend_exit(); + fpsimd_suspend_exit(); /* Restore additional feature-specific configuration */ ptrauth_suspend_exit(); -- 2.47.3
