From: Manikanta Mylavarapu <[email protected]> IPQ5332 security software running under trustzone requires metadata size. With new command support added in TrustZone that includes a size parameter, pass metadata size as well.
Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Manikanta Mylavarapu <[email protected]> Signed-off-by: Gokul Sriram Palanisamy <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Tested-by: Vignesh Viswanathan <[email protected]> Signed-off-by: Varadarajan Narayanan <[email protected]> --- drivers/firmware/qcom/qcom_scm.c | 16 ++++++++++++---- drivers/firmware/qcom/qcom_scm.h | 1 + 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index 3eaa4c9ccf3c..8902c445cf19 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -598,7 +598,7 @@ EXPORT_SYMBOL_GPL(devm_qcom_scm_pas_context_alloc); static int __qcom_scm_pas_init_image(struct device *dev, u32 pas_id, dma_addr_t mdata_phys, - struct qcom_scm_res *res) + struct qcom_scm_res *res, size_t size) { struct qcom_scm_desc desc = { .svc = QCOM_SCM_SVC_PIL, @@ -619,6 +619,14 @@ static int __qcom_scm_pas_init_image(struct device *dev, u32 pas_id, desc.args[1] = mdata_phys; + if (__qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL, + QCOM_SCM_PIL_PAS_INIT_IMAGE_V2)) { + desc.cmd = QCOM_SCM_PIL_PAS_INIT_IMAGE_V2; + desc.arginfo = QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, + QCOM_SCM_VAL); + desc.args[2] = size; + } + ret = qcom_scm_call(dev, &desc, res); qcom_scm_bw_disable(); @@ -644,7 +652,7 @@ static int qcom_scm_pas_prep_and_init_image(struct device *dev, memcpy(mdata_buf, metadata, size); mdata_phys = qcom_tzmem_to_phys(mdata_buf); - ret = __qcom_scm_pas_init_image(dev, ctx->pas_id, mdata_phys, &res); + ret = __qcom_scm_pas_init_image(dev, ctx->pas_id, mdata_phys, &res, size); if (ret < 0) qcom_tzmem_free(mdata_buf); else @@ -683,7 +691,7 @@ static int __qcom_scm_pas_init_image2(struct device *dev, u32 pas_id, memcpy(mdata_buf, metadata, size); - ret = __qcom_scm_pas_init_image(dev, pas_id, mdata_phys, &res); + ret = __qcom_scm_pas_init_image(dev, pas_id, mdata_phys, &res, size); if (ret < 0 || !ctx) { dma_free_coherent(dev, size, mdata_buf, mdata_phys); } else if (ctx) { @@ -2528,7 +2536,7 @@ static void qcom_scm_gunyah_wdt_init(struct qcom_scm *scm) gunyah_wdt_dev = platform_device_register_simple("gunyah-wdt", -1, NULL, 0); if (IS_ERR(gunyah_wdt_dev)) { - dev_err(scm->dev, "Failed to register Gunyah watchdog device: %ld\n", + dev_err(scm->dev, "Failed to register Gunyah watchdog device: %pe\n", PTR_ERR(gunyah_wdt_dev)); return; } diff --git a/drivers/firmware/qcom/qcom_scm.h b/drivers/firmware/qcom/qcom_scm.h index cf90a565fdfb..e58c76aba45c 100644 --- a/drivers/firmware/qcom/qcom_scm.h +++ b/drivers/firmware/qcom/qcom_scm.h @@ -105,6 +105,7 @@ int qcom_scm_shm_bridge_enable(struct device *scm_dev); #define QCOM_SCM_PIL_PAS_SHUTDOWN 0x06 #define QCOM_SCM_PIL_PAS_IS_SUPPORTED 0x07 #define QCOM_SCM_PIL_PAS_MSS_RESET 0x0a +#define QCOM_SCM_PIL_PAS_INIT_IMAGE_V2 0x1a #define QCOM_SCM_PIL_PAS_GET_RSCTABLE 0x21 #define QCOM_SCM_SVC_IO 0x05 -- 2.34.1
