Re: [PATCH v3 3/5] iommu/x86: Share the architectural MSI reserved range

[Yu Zhang]

On Tue, Aug 11, 2026 at 01:21:24PM -0300, Jason Gunthorpe wrote:
> On Tue, Aug 11, 2026 at 11:50:19PM +0800, Yu Zhang wrote:
> > @@ -50,8 +50,6 @@
> >  #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28))
> >  
> >  /* Reserved IOVA ranges */
> > -#define MSI_RANGE_START            (0xfee00000)
> > -#define MSI_RANGE_END              (0xfeefffff)
> >  #define HT_RANGE_START             (0xfd00000000ULL)
> >  #define HT_RANGE_END               (0xffffffffffULL)
> >  
> > @@ -3097,8 +3095,9 @@ static void amd_iommu_get_resv_regions(struct device 
> > *dev,
> >             list_add_tail(&region->list, head);
> >     }
> >  
> > -   region = iommu_alloc_resv_region(MSI_RANGE_START,
> > -                                    MSI_RANGE_END - MSI_RANGE_START + 1,
> > +   region = iommu_alloc_resv_region(X86_IOMMU_MSI_RANGE_START,
> > +                                    X86_IOMMU_MSI_RANGE_END -
> > +                                    X86_IOMMU_MSI_RANGE_START + 1,
> >                                      0, IOMMU_RESV_MSI, GFP_KERNEL);
> 
> Maybe instead of adding constants you should add a
> iommu_alloc_resv_x86_msi_region()
> 
> That is just an inline doing the above?
> 

Thank you, Jason!
Do you mean something like below?

-#define X86_IOMMU_MSI_RANGE_START        0xfee00000
-#define X86_IOMMU_MSI_RANGE_END          0xfeefffff
+static inline struct iommu_resv_region *
+iommu_alloc_resv_x86_msi_region(void)
+{
+       return iommu_alloc_resv_region(0xfee00000, SZ_1M, 0,
+                                      IOMMU_RESV_MSI, GFP_KERNEL);
+}

So all the drivers(Intel vt-d, AMD IOMMU, and Hyper-V pvIOMMU) can just
call iommu_alloc_resv_x86_msi_region() directly. :)

B.R.
Yu
> Jason
>