When re-entering the VM or synchronizing PMU state after a guest counter overflow interrupt, evaluate whether any enabled and unmasked guest counter has overflowed ((PMOVSSET_EL0 & PMINTENSET_EL1 & PMCNTENSET_EL0) with PMCR_EL0.E set) and update the virtual PMU interrupt level in the vGIC accordingly.
Signed-off-by: Colton Lewis <[email protected]> --- arch/arm64/kvm/pmu-direct.c | 55 +++++++++++++++++++++++++++++++++++++ arch/arm64/kvm/pmu-emul.c | 12 ++++++-- arch/arm64/kvm/pmu.c | 8 +++++- include/kvm/arm_pmu.h | 2 ++ 4 files changed, 73 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/pmu-direct.c b/arch/arm64/kvm/pmu-direct.c index 95b5a64052762..ec821aa54688f 100644 --- a/arch/arm64/kvm/pmu-direct.c +++ b/arch/arm64/kvm/pmu-direct.c @@ -534,6 +534,61 @@ void kvm_pmu_handle_guest_irq(u64 pmovsr) for_each_set_bit(i, (unsigned long *)&govf, 64) set_bit(i, (unsigned long *)__ctxt_sys_reg(&vcpu->arch.ctxt, PMOVSSET_EL0)); + + if (kvm_pmu_part_overflow_status(vcpu)) { + kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); + + if (!in_nmi()) + kvm_vcpu_kick(vcpu); + else + irq_work_queue(&vcpu->arch.pmu.overflow_work); + } +} + +/** + * kvm_pmu_part_overflow_status() - Determine if any guest counters have overflowed + * @vcpu: Pointer to struct kvm_vcpu + * + * Determine if any guest counters have overflowed and therefore an + * IRQ needs to be injected into the guest. If an overflow is detected + * while access is VCPU_PMU_ACCESS_FREE (for example, after state + * restoration via KVM_SET_ONE_REG), transition the vCPU to + * VCPU_PMU_ACCESS_GUEST_OWNED. + * + * Return: True if there was an overflow, false otherwise + */ +bool kvm_pmu_part_overflow_status(struct kvm_vcpu *vcpu) +{ + u64 mask = kvm_vcpu_pmu_guest_counter_mask(vcpu); + u64 pmovs, pmint, pmcr; + unsigned long flags; + bool overflow; + + local_irq_save(flags); + if (vcpu->arch.pmu.loaded_on_cpu && + vcpu == kvm_get_running_vcpu()) { + u64 hw_ovf = read_sysreg(pmovsset_el0) & mask; + + if (hw_ovf) { + __vcpu_rmw_sys_reg(vcpu, PMOVSSET_EL0, |=, hw_ovf); + write_sysreg(hw_ovf, pmovsclr_el0); + } + pmint = read_pmintenset(); + pmcr = read_pmcr(); + } else { + pmint = __vcpu_sys_reg(vcpu, PMINTENSET_EL1); + pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0); + } + + pmovs = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); + local_irq_restore(flags); + + overflow = (pmcr & ARMV8_PMU_PMCR_E) && (mask & pmovs & pmint); + + if (overflow && kvm_pmu_get_access(vcpu) == VCPU_PMU_ACCESS_FREE) + kvm_pmu_set_guest_owned(vcpu); + + return overflow; } /** diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c index e8195984b0373..21e2c96abfdb1 100644 --- a/arch/arm64/kvm/pmu-emul.c +++ b/arch/arm64/kvm/pmu-emul.c @@ -268,7 +268,7 @@ void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val) * counter where the values of the global enable control, PMOVSSET_EL0[n], and * PMINTENSET_EL1[n] are all 1. */ -bool kvm_pmu_overflow_status(struct kvm_vcpu *vcpu) +bool kvm_pmu_emul_overflow_status(struct kvm_vcpu *vcpu) { u64 reg = __vcpu_sys_reg(vcpu, PMOVSSET_EL0); @@ -296,8 +296,14 @@ bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu) { struct kvm_sync_regs *sregs = &vcpu->run->s.regs; bool run_level = sregs->device_irq_level & KVM_ARM_DEV_PMU; + bool overflow; - return kvm_pmu_overflow_status(vcpu) != run_level; + if (kvm_pmu_is_partitioned(vcpu->kvm)) + overflow = kvm_pmu_part_overflow_status(vcpu); + else + overflow = kvm_pmu_emul_overflow_status(vcpu); + + return overflow != run_level; } /* @@ -400,7 +406,7 @@ static void kvm_pmu_perf_overflow(struct perf_event *perf_event, kvm_pmu_counter_increment(vcpu, BIT(idx + 1), ARMV8_PMUV3_PERFCTR_CHAIN); - if (kvm_pmu_overflow_status(vcpu)) { + if (kvm_pmu_emul_overflow_status(vcpu)) { kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); if (!in_nmi()) diff --git a/arch/arm64/kvm/pmu.c b/arch/arm64/kvm/pmu.c index a8214ab52fcb5..4a3c6600b2678 100644 --- a/arch/arm64/kvm/pmu.c +++ b/arch/arm64/kvm/pmu.c @@ -409,12 +409,18 @@ u64 kvm_pmu_evtyper_mask(struct kvm *kvm) static void kvm_pmu_update_state(struct kvm_vcpu *vcpu) { struct kvm_pmu *pmu = &vcpu->arch.pmu; + bool overflow; if (unlikely(!irqchip_in_kernel(vcpu->kvm))) return; + if (kvm_pmu_is_partitioned(vcpu->kvm)) + overflow = kvm_pmu_part_overflow_status(vcpu); + else + overflow = kvm_pmu_emul_overflow_status(vcpu); + WARN_ON(kvm_vgic_inject_irq(vcpu->kvm, vcpu, pmu->irq_num, - kvm_pmu_overflow_status(vcpu), pmu)); + overflow, pmu)); } /** diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index 955f142a41b94..428a609eaf1a7 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -91,6 +91,8 @@ bool kvm_set_pmuserenr(u64 val); void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); void kvm_vcpu_pmu_resync_el0(void); +bool kvm_pmu_emul_overflow_status(struct kvm_vcpu *vcpu); +bool kvm_pmu_part_overflow_status(struct kvm_vcpu *vcpu); #define kvm_vcpu_has_pmu(vcpu) \ (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3)) -- 2.56.0.rc1.310.g51773c2048-goog
