From: Leonardo Bras <[email protected]>

As a first step of changing the encoding for the Stage2 PTE descriptor,
introduce the DBM bit, and adapt every usage of writable to use the DBM
bit (51) instead of S2AP[1]/Dirty bit (7).

With DBM as the write permission bit and S2AP[1] as the dirty state,
the encoding follows the FEAT_S2PIE principle of managing permissions
and dirty state independently.

For this step, we convert usages of RW(Dirty) -> WD(DBM|Dirty): every
writable mapping sets both bits, read-only mappings clear both, and no
behaviour changes.

Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Leonardo Bras <[email protected]>
[zhengtian: keep the nested walker reading writability from S2AP[1]
alone, document why, and reword the commit message]
Signed-off-by: Tian Zheng <[email protected]>
---
 arch/arm64/include/asm/kvm_pgtable.h | 3 +++
 arch/arm64/kvm/hyp/pgtable.c         | 7 ++++---
 arch/arm64/kvm/nested.c              | 5 +++++
 arch/arm64/kvm/ptdump.c              | 4 ++--
 4 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_pgtable.h 
b/arch/arm64/include/asm/kvm_pgtable.h
index 41a8687938eb..37baa86d6fd8 100644
--- a/arch/arm64/include/asm/kvm_pgtable.h
+++ b/arch/arm64/include/asm/kvm_pgtable.h
@@ -93,10 +93,13 @@ typedef u64 kvm_pte_t;

 #define KVM_PTE_LEAF_ATTR_HI_S2_XN     GENMASK(54, 53)

+#define KVM_PTE_LEAF_ATTR_HI_S2_DBM    BIT(51)
+
 #define KVM_PTE_LEAF_ATTR_HI_S1_GP     BIT(50)

 #define KVM_PTE_LEAF_ATTR_S2_PERMS     (KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \
                                         KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | \
+                                        KVM_PTE_LEAF_ATTR_HI_S2_DBM | \
                                         KVM_PTE_LEAF_ATTR_HI_S2_XN)

 /* pKVM invalid pte encodings */
diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index b74dd5ce1efd..50f4d3a74f77 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c
@@ -732,7 +732,7 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, 
enum kvm_pgtable_prot p
                attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;

        if (prot & KVM_PGTABLE_PROT_W)
-               attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
+               attr |= KVM_PTE_LEAF_ATTR_HI_S2_DBM | 
KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;

        if (!kvm_lpa2_is_enabled())
                attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh);
@@ -753,7 +753,7 @@ enum kvm_pgtable_prot kvm_pgtable_stage2_pte_prot(kvm_pte_t 
pte)

        if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R)
                prot |= KVM_PGTABLE_PROT_R;
-       if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W)
+       if (pte & KVM_PTE_LEAF_ATTR_HI_S2_DBM)
                prot |= KVM_PGTABLE_PROT_W;

        switch (FIELD_GET(KVM_PTE_LEAF_ATTR_HI_S2_XN, pte)) {
@@ -1288,6 +1288,7 @@ static int stage2_update_leaf_attrs(struct kvm_pgtable 
*pgt, u64 addr,
 int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
 {
        return stage2_update_leaf_attrs(pgt, addr, size, 0,
+                                       KVM_PTE_LEAF_ATTR_HI_S2_DBM |
                                        KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
                                        NULL, NULL,
                                        KVM_PGTABLE_WALK_IGNORE_EAGAIN);
@@ -1368,7 +1369,7 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable 
*pgt, u64 addr,
                set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;

        if (prot & KVM_PGTABLE_PROT_W)
-               set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
+               set |= KVM_PTE_LEAF_ATTR_HI_S2_DBM | 
KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;

        if (prot & KVM_PGTABLE_PROT_X) {
                ret = stage2_set_xn_attr(prot, &xn);
diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
index b191365d97cc..4d7f52f4bc09 100644
--- a/arch/arm64/kvm/nested.c
+++ b/arch/arm64/kvm/nested.c
@@ -388,6 +388,11 @@ static int walk_nested_s2_pgd(struct kvm_vcpu *vcpu, 
phys_addr_t ipa,
                (ipa & GENMASK_ULL(addr_bottom - 1, 0));
        out->output = paddr;
        out->block_size = 1UL << ((3 - level) * stride + wi->pgshift);
+       /*
+        * L1 descriptors keep the legacy encoding: S2AP[1] is the write
+        * permission, and DBM is RES0 (the L1-visible HAFDBS is limited
+        * to AF-only).
+        */
        out->readable = desc & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;
        out->writable = desc & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
        out->level = level;
diff --git a/arch/arm64/kvm/ptdump.c b/arch/arm64/kvm/ptdump.c
index 69899797dbad..b0cb8d84a9e9 100644
--- a/arch/arm64/kvm/ptdump.c
+++ b/arch/arm64/kvm/ptdump.c
@@ -40,8 +40,8 @@ static const struct ptdump_prot_bits stage2_pte_bits[] = {
                .clear  = " ",
        },
        {
-               .mask   = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
-               .val    = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
+               .mask   = KVM_PTE_LEAF_ATTR_HI_S2_DBM,
+               .val    = KVM_PTE_LEAF_ATTR_HI_S2_DBM,
                .set    = "W",
                .clear  = " ",
        },
--
2.43.0


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