On 9/30/2026 8:25 AM, Oliver Upton wrote:
Hi Tian,

On Tue, Sep 29, 2026 at 06:36:41PM +0800, Tian Zheng wrote:
From: Leonardo Bras <[email protected]>

As a first step of changing the encoding for the Stage2 PTE descriptor,
introduce the DBM bit, and adapt every usage of writable to use the DBM
bit (51) instead of S2AP[1]/Dirty bit (7).

With DBM as the write permission bit and S2AP[1] as the dirty state,
the encoding follows the FEAT_S2PIE principle of managing permissions
and dirty state independently.

For this step, we convert usages of RW(Dirty) -> WD(DBM|Dirty): every
writable mapping sets both bits, read-only mappings clear both, and no
behaviour changes.

Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Leonardo Bras <[email protected]>
[zhengtian: keep the nested walker reading writability from S2AP[1]
alone, document why, and reword the commit message]
Signed-off-by: Tian Zheng <[email protected]>
---
  arch/arm64/include/asm/kvm_pgtable.h | 3 +++
  arch/arm64/kvm/hyp/pgtable.c         | 7 ++++---
  arch/arm64/kvm/nested.c              | 5 +++++
  arch/arm64/kvm/ptdump.c              | 4 ++--
  4 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_pgtable.h 
b/arch/arm64/include/asm/kvm_pgtable.h
index 41a8687938eb..37baa86d6fd8 100644
--- a/arch/arm64/include/asm/kvm_pgtable.h
+++ b/arch/arm64/include/asm/kvm_pgtable.h
@@ -93,10 +93,13 @@ typedef u64 kvm_pte_t;

  #define KVM_PTE_LEAF_ATTR_HI_S2_XN    GENMASK(54, 53)

+#define KVM_PTE_LEAF_ATTR_HI_S2_DBM    BIT(51)
+
  #define KVM_PTE_LEAF_ATTR_HI_S1_GP    BIT(50)

  #define KVM_PTE_LEAF_ATTR_S2_PERMS    (KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \
                                         KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | \
+                                        KVM_PTE_LEAF_ATTR_HI_S2_DBM | \
                                         KVM_PTE_LEAF_ATTR_HI_S2_XN)

  /* pKVM invalid pte encodings */
diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
index b74dd5ce1efd..50f4d3a74f77 100644
--- a/arch/arm64/kvm/hyp/pgtable.c
+++ b/arch/arm64/kvm/hyp/pgtable.c
@@ -732,7 +732,7 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, 
enum kvm_pgtable_prot p
                attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R;

        if (prot & KVM_PGTABLE_PROT_W)
-               attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
+               attr |= KVM_PTE_LEAF_ATTR_HI_S2_DBM | 
KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;

Hmm... I'd actually like to see this structured where the "write" bit
could either be S2AP_W or DBM depending on if the system supports
FEAT_HAFDBS. Look at how HVHE is handled for selecting the right AP
encoding for the hyp stage-1 page tables.


Hi Oliver,

Thanks for the suggestion. I missed the case where FEAT_HAFDBS is not
supported. Systems without the feature should keep the original
encoding, with S2AP[1] as the write permission bit. I'll follow the HVHE
pattern to select between the two encodings in the next version.

Thanks!
Tian

diff --git a/arch/arm64/kvm/ptdump.c b/arch/arm64/kvm/ptdump.c
index 69899797dbad..b0cb8d84a9e9 100644
--- a/arch/arm64/kvm/ptdump.c
+++ b/arch/arm64/kvm/ptdump.c
@@ -40,8 +40,8 @@ static const struct ptdump_prot_bits stage2_pte_bits[] = {
                .clear  = " ",
        },
        {
-               .mask   = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
-               .val    = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
+               .mask   = KVM_PTE_LEAF_ATTR_HI_S2_DBM,
+               .val    = KVM_PTE_LEAF_ATTR_HI_S2_DBM,
                .set    = "W",
                .clear  = " ",
        },
--
2.43.0



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