Some StarFive clocks only advertise the divider and invert capabilities
(via JH71X0_CLK_INVERT, without ENABLE). Add the JH71X0_IDIV() macro
to declare such clocks, and jh71x0_clk_idiv_ops, which combines the
divider rate operations with get_phase/set_phase.

Signed-off-by: Changhuang Liang <[email protected]>
---
 drivers/clk/starfive/clk-starfive-jh71x0.c | 12 ++++++++++++
 drivers/clk/starfive/clk-starfive-jh71x0.h |  8 ++++++++
 2 files changed, 20 insertions(+)

diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c 
b/drivers/clk/starfive/clk-starfive-jh71x0.c
index bb7706ede1a6..1f98f1f8f0a5 100644
--- a/drivers/clk/starfive/clk-starfive-jh71x0.c
+++ b/drivers/clk/starfive/clk-starfive-jh71x0.c
@@ -302,6 +302,15 @@ static const struct clk_ops jh71x0_clk_inv_ops = {
        .debug_init = jh71x0_clk_debug_init,
 };
 
+static const struct clk_ops jh71x0_clk_idiv_ops = {
+       .get_phase = jh71x0_clk_get_phase,
+       .set_phase = jh71x0_clk_set_phase,
+       .recalc_rate = jh71x0_clk_recalc_rate,
+       .determine_rate = jh71x0_clk_determine_rate,
+       .set_rate = jh71x0_clk_set_rate,
+       .debug_init = jh71x0_clk_debug_init,
+};
+
 const struct clk_ops *starfive_jh71x0_clk_ops(u32 max)
 {
        if (max & JH71X0_CLK_DIV_MASK) {
@@ -312,6 +321,9 @@ const struct clk_ops *starfive_jh71x0_clk_ops(u32 max)
                }
                if (max & JH71X0_CLK_ENABLE)
                        return &jh71x0_clk_gdiv_ops;
+               else if (max & JH71X0_CLK_INVERT)
+                       return &jh71x0_clk_idiv_ops;
+
                if (max == JH71X0_CLK_FRAC_MAX)
                        return &jh71x0_clk_fdiv_ops;
                return &jh71x0_clk_div_ops;
diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.h 
b/drivers/clk/starfive/clk-starfive-jh71x0.h
index 2a1f0fb4cbb1..4cb3c2ef9525 100644
--- a/drivers/clk/starfive/clk-starfive-jh71x0.h
+++ b/drivers/clk/starfive/clk-starfive-jh71x0.h
@@ -104,6 +104,14 @@ struct jh71x0_clk_data {
        .parents = { [0] = _parent },                                           
\
 }
 
+#define JH71X0_IDIV(_idx, _name, _flags, _max, _parent)                        
\
+[_idx] = {                                                                     
\
+       .name = _name,                                                          
\
+       .flags = _flags,                                                        
\
+       .max = JH71X0_CLK_INVERT | (_max),                                      
\
+       .parents = { [0] = _parent },                                           
\
+}
+
 struct jh71x0_clk {
        struct clk_hw hw;
        unsigned int idx;
-- 
2.25.1


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