On 01/05/2013 05:06 AM, Laxman Dewangan wrote: > NVIDIA's Tegra114 has APB DMA controller which supports channel wise > pause control. The global pause is used for clock gating and hence > DMA registers are not accessible if DMAs are globally disabled. > > Add support for use of channel wise pause feature for Tegra114 SOCs.
Aside from the comments already made by Vinod, Reviewed-by: Stephen Warren <[email protected]> -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
