Commit-ID:  77b339bce3e21f7a069447fc25a414b18e36fa2e
Gitweb:     http://git.kernel.org/tip/77b339bce3e21f7a069447fc25a414b18e36fa2e
Author:     Yan, Zheng <[email protected]>
AuthorDate: Tue, 13 Aug 2013 14:29:42 +0800
Committer:  Ingo Molnar <[email protected]>
CommitDate: Fri, 16 Aug 2013 17:55:50 +0200

perf/x86/intel/uncore: Enable EV_SEL_EXT bit for PCU

This patch adds support for the SNB-EP PCU uncore PMU extra_sel_bit
(bit 21) which is missing from the documentation in Table-2.75 of
Intel Xeon Processor E5-2600 Product Family Uncore Performance
Monitoring Guide. It is referred to later in Table-2.81. Without
this selection bit explicitly enabled by the kernel, some events
such as COREx_TRANSITION_CYCLES do not count correctly.

Signed-off-by: Yan, Zheng <[email protected]>
Reviewed-by: Stephane Eranian <[email protected]>
Signed-off-by: Peter Zijlstra <[email protected]>
Link: 
http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
---
 arch/x86/kernel/cpu/perf_event_intel_uncore.c | 2 +-
 arch/x86/kernel/cpu/perf_event_intel_uncore.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c 
b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 6b8b9c9..e9696d8 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -301,7 +301,7 @@ static struct attribute *snbep_uncore_cbox_formats_attr[] = 
{
 };
 
 static struct attribute *snbep_uncore_pcu_formats_attr[] = {
-       &format_attr_event.attr,
+       &format_attr_event_ext.attr,
        &format_attr_occ_sel.attr,
        &format_attr_edge.attr,
        &format_attr_inv.attr,
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h 
b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
index 628500e..a80ab71 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
@@ -117,6 +117,7 @@
                                (SNBEP_PMON_CTL_EV_SEL_MASK | \
                                 SNBEP_PCU_MSR_PMON_CTL_OCC_SEL_MASK | \
                                 SNBEP_PMON_CTL_EDGE_DET | \
+                                SNBEP_PMON_CTL_EV_SEL_EXT | \
                                 SNBEP_PMON_CTL_INVERT | \
                                 SNBEP_PCU_MSR_PMON_CTL_TRESH_MASK | \
                                 SNBEP_PCU_MSR_PMON_CTL_OCC_INVERT | \
--
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