> + pr_debug("Command IRQ complete %d %d %x\n", cmd->opcode, cmd->error,
> + cmd->flags);
dev_dbg... (and a few other places)
> +/* Set MMC clock / power.
> + * Note: This controller uses a simple divider scheme therefore it cannot run
> + * SD/MMC cards at full speed (24/20MHz). HCLK (=33MHz PCI clock?) is too
> high
> + * and the next slowest is 16MHz (div=2).
> + */
> +static void toshsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
This has some very long delays with interrupts off from the
spin_lock_irqsave. I guess thats hardly #1 priority though nor a killer.
> + /* reset */
> + toshsd_writew(host, SD_SOFTWARERESET, 0); /* assert */
> + mdelay(2);
> + toshsd_writew(host, SD_SOFTWARERESET, 1); /* deassert */
> + mdelay(2);
This doesn't do quite what you might think - if the device is mmio mapped
then the write can be posted so the mdelay(2) may not be 2mS. I guess if
the old driver didn't do it then it was already plenty long enough...
> + base = pci_resource_start(pdev, 0);
> + dev_info(&pdev->dev, "MMIO %pa, IRQ %d\n", &base, pdev->irq);
dbg
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