Update binding spec for Qualcomm SoC PHYs with APQ8064 compatibles. Signed-off-by: Srinivas Kandagatla <[email protected]> --- Documentation/devicetree/bindings/phy/qcom-phy.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom-phy.txt b/Documentation/devicetree/bindings/phy/qcom-phy.txt index 76bfbd0..6bff1e0 100644 --- a/Documentation/devicetree/bindings/phy/qcom-phy.txt +++ b/Documentation/devicetree/bindings/phy/qcom-phy.txt @@ -1,4 +1,4 @@ -Qualcomm IPQ806x SATA PHY Controller +Qualcomm IPQ806x/APQ8064 SATA PHY Controller ------------------------------------ SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. @@ -6,6 +6,7 @@ Each SATA PHY controller should have its own node. Required properties: - compatible: compatible list, contains "qcom,ipq806x-sata-phy" + or "qcom,apq8064-sata-phy". - reg: offset and length of the SATA PHY register set; - #phy-cells: must be zero - clocks: must be exactly one entry -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
