On Thu, 2005-03-17 at 14:05 -0800, Jesse Barnes wrote:
> On Thursday, March 17, 2005 1:38 pm, Evgeniy Polyakov wrote:
> > The most significant part there - is requirement to store
> > u32 seq in each CPU's cache and thus flush cacheline +
> > invalidate/get from mem on each other cpus
> > each time it is accessed, which is a big price.
> 
> Same thing has to happen with the lock.  To put it simply, writing global 
> variables from multiple CPUs with anything other than very low frequency is 
> bad.
> 
> > It is totally Guillaume's work - so he decides,
> > I would recomend per cpu counters and processor's
> > id in each message.
> > And of course userspace should take care of misordered
> > messages.
> > I personally prefer such mechanism.
> 
> Yep, I agree.  Hopefully Guillaume will too :)

Sure, I agree and I will implement the per cpu counters solution with a
processor id in each message. 

Thank you very much Jesse and Evgeniy for your great help,
Best regards,

Guillaume

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