Ok, this return is still bugging me - we're logging the error which
caused the counter overflow but we go and explicitly clear _STATUS so
that machine_check_poll doesn't pick up the same error again.
Even though, machine_check_poll is intended to log the thresholding
error.
Which actually makes me think that that machine_check_poll is actually
completely useless there. IOW, how about that instead:
---
From: Chen Yucong <sla...@gmail.com <mailto:sla...@gmail.com>>
Date: Thu, 2 Oct 2014 14:48:19 +0200
Subject: [PATCH] x86, MCE, AMD: Correct thresholding error logging
mce_setup() does not gather the content of IA32_MCG_STATUS, so it
should be read explicitly. Moreover, we need to clear IA32_MCx_STATUS
to avoid that mce_log() logs the processed threshold event again
at next time.
But we do the logging ourselves and machine_check_poll() is completely
useless there. So kill it.
Signed-off-by: Chen Yucong <sla...@gmail.com <mailto:sla...@gmail.com>>
Signed-off-by: Borislav Petkov <b...@suse.de <mailto:b...@suse.de>>
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c
b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 1c54d3d61a4d..9ce64955559d 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -270,14 +270,13 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
static void amd_threshold_interrupt(void)
{
u32 low = 0, high = 0, address = 0;
+ int cpu = smp_processor_id();
unsigned int bank, block;
struct mce m;
- mce_setup(&m);
-
/* assume first bank caused it */
for (bank = 0; bank < mca_cfg.banks; ++bank) {
- if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
+ if (!(per_cpu(bank_map, cpu) & (1 << bank)))
continue;
for (block = 0; block < NR_BLOCKS; ++block) {
if (block == 0) {
@@ -309,20 +308,21 @@ static void amd_threshold_interrupt(void)
* Log the machine check that caused the threshold
* event.
*/
- machine_check_poll(MCP_TIMESTAMP,
- &__get_cpu_var(mce_poll_banks));
-
- if (high & MASK_OVERFLOW_HI) {
- rdmsrl(address, m.misc);
- rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
- m.bank = K8_MCE_THRESHOLD_BASE
- + bank * NR_BLOCKS
- + block;
- mce_log(&m);
- return;
- }
+ if (high & MASK_OVERFLOW_HI)
+ goto log;
}
}
+ return;
+
+log:
+ mce_setup(&m);
+ rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
+ rdmsrl(address, m.misc);
+ rdmsrl(MSR_IA32_MCx_STATUS(bank), m.status);
+ m.bank = K8_MCE_THRESHOLD_BASE + bank * NR_BLOCKS + block;
I am not understanding why m.bank is assigned this value..
It only causes incorrect decoding-
[ 608.832916] DEBUG: raise_amd_threshold_event
[ 608.832926] [Hardware Error]: Corrected error, no action required.
[ 608.833143] [Hardware Error]: CPU:26 (15:2:0)
MC165_STATUS[-|CE|MiscV|-|AddrV|-|-]: 0x8c00000000000000
[ 608.833551] [Hardware Error]: MC165_ADDR: 0x0000000000000000
[ 608.833777] [Hardware Error]: cache level: RESV, tx: INSN
[ 608.834034] amd_inject module loaded ...
(Obviously, as in amd_decode_mce() we switch (m->bank) for decoding the
status and there is no bank 165)
OTOH, if m.bank = bank;
Then we get correct decoding info-
[ 58.021978] DEBUG: raise_amd_threshold_event
[ 58.021992] [Hardware Error]: Corrected error, no action required.
[ 58.022155] [Hardware Error]: CPU:0 (15:60:0)
MC4_STATUS[-|CE|MiscV|-|AddrV|-|-]: 0x8c00000000000000
[ 58.022393] [Hardware Error]: MC4_ADDR: 0x0000000000000000
[ 58.022531] [Hardware Error]: MC4 Error (node 0): DRAM ECC error
detected on the NB.
<snip..it's throws WARN as "Something is rotten in the state of Denmark".>
<.. but that's fine. we are just fake-injecting errors here.. :) >
[ 58.022933] [Hardware Error]: cache level: RESV, tx: INSN
[ 58.023084] amd_inject module loaded ...
Thanks,
-Aravind.
+ mce_log(&m);
+
+ wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
}
/*
--
2.0.0
--
Regards/Gruss,
Boris.
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