Hi Caesar,
On Thu, Oct 23, 2014 at 05:40:06PM +0800, Caesar Wang wrote:
> This patch is depend on rk3288-thermal.dtsi,or
> it will compile error.
>
> If the temperature over a period of time High,over 120C
> the resulting TSHUT gave CRU module,let it reset
> the entire chip,or via GPIO give PMIC.
>
> Signed-off-by: Caesar Wang <caesar.w...@rock-chips.com>
> ---
> arch/arm/boot/dts/rk3288.dtsi | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index cb18bb4..85fc17a 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -15,6 +15,7 @@
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/pinctrl/rockchip.h>
> #include <dt-bindings/clock/rk3288-cru.h>
> +#include <dt-bindings/thermal/thermal.h>
> #include "skeleton.dtsi"
>
> / {
> @@ -66,6 +67,7 @@
> 216000 900000
> 126000 900000
> >;
> + #cooling-cells = <2>; /* min followed by max */
> clock-latency = <40000>;
> clocks = <&cru ARMCLK>;
> };
> @@ -346,6 +348,19 @@
> status = "disabled";
> };
>
> + tsadc: tsadc@ff280000 {
> + compatible = "rockchip,rk3288-tsadc";
> + reg = <0xff280000 0x100>;
> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
> + clock-names = "tsadc", "apb_pclk";
> + pinctrl-names = "default";
> + pinctrl-0 = <&otp_out>;
> + #thermal-sensor-cells = <1>;
> + hw-shut-temp = <120000>;
I do not think this is a good value. You have (in the other DTS file)
passive trip point at 80 and critical (which should result in orderly
shutdown) at 125. But here you define hardware-controlled shutdown at
120C, which is backwards. You should have:
passive <= critical <= hardware
Thanks.
--
Dmitry
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