We were having intermittent problems writing to SRAM chip on SPI bus on vf610 SoM. Added support for CS setup and hold times to meet the SRAM spec. In the process noticed that the baud rate was a little high.
Aaron Brice (2): spi: fsl-dspi: Fix clock rate scale values spi: fsl-dspi: Add ~50ns delay between cs and sck drivers/spi/spi-fsl-dspi.c | 84 ++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 70 insertions(+), 14 deletions(-) -- 2.1.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
