On Thu, May 21, 2015 at 4:57 PM, Ezequiel Garcia <[email protected]> wrote: > This commit passes CLK_SET_RATE_PARENT to the "mips_div", > "mips_internal_div", and "mips_pll_mux" clocks. This flag is needed for the > "mips" clock to propagate rate changes up to the "mips_pll" root clock. > > Signed-off-by: Govindraj Raja <[email protected]> > Signed-off-by: Ezequiel Garcia <[email protected]>
IIRC the clk core will prefer changing a downstream divider over propagating the rate change up another level. So, for example, if MIPS_PLL is initially 400Mhz and we request a MIPS rate of 200Mhz, we'll change the first intermediate divider to /2 rather than propagate the rate change up to MIPS_PLL. Wouldn't it be more power-efficient to set the MIPS_PLL directly to the requested rate rather than using external dividers to divide it down? -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
