Hi Andrew,
This helps at least on Ingo's and my [EMAIL PROTECTED]
and shouldn't bite anybody else.
Please add to -mm for later inclusion into mainline.
Thanks,
Karsten
------
From: Karsten Wiese <[EMAIL PROTECTED]>
The VIA VT8237's IOAPIC sends 'APIC De-Assert Messages' by default,
causing another CPU interrupt when the IRQ pin is de-asserted.
This feature is switched off by the patch to get rid of
doubled ioapic level interrupt rates.
Signed-off-by: Karsten Wiese <[EMAIL PROTECTED]>
--- linux-2.6.13-rc6/drivers/pci/quirks.c 2005-08-08 11:46:05.000000000
+0200
+++ linux-2.6.13/drivers/pci/quirks.c 2005-08-18 10:15:06.000000000 +0200
@@ -403,6 +403,25 @@ static void __devinit quirk_via_ioapic(s
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686,
quirk_via_ioapic );
/*
+ * VIA 8237: Some BIOSs don't set the 'Bypass APIC De-Assert Message' Bit.
+ * This leads to doubled level interrupt rates.
+ * Set this bit to get rid of cycle wastage.
+ * Otherwise uncritical.
+ */
+static void __devinit quirk_via_vt8237_bypass_apic_deassert(struct pci_dev
*dev)
+{
+ u8 misc_control2;
+#define BYPASS_APIC_DEASSERT 8
+
+ pci_read_config_byte(dev, 0x5B, &misc_control2);
+ if (!(misc_control2 & BYPASS_APIC_DEASSERT)) {
+ printk(KERN_INFO "PCI: Bypassing VIA 8237 APIC De-Assert
Message\n");
+ pci_write_config_byte(dev, 0x5B,
misc_control2|BYPASS_APIC_DEASSERT);
+ }
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,
quirk_via_vt8237_bypass_apic_deassert);
+
+/*
* The AMD io apic can hang the box when an apic irq is masked.
* We check all revs >= B0 (yet not in the pre production!) as the bug
* is currently marked NoFix
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