On 07/14/2015 04:00 AM, Will Deacon wrote:
On Mon, Jul 13, 2015 at 10:31:36PM +0100, David Daney wrote:
From: David Daney <[email protected]>
Needed to make pci_iomap() work.
Care to elaborate?
I should have explained what I am doing here a little better.
Systems based on the Cavium ThunderX processor may have up to 8
independent PCIe root complexes. The I/O space on each bus occupies an
independent physical address window.
So, in order to be able to map all of these (semi) contiguously, we need
a lot more virtual address space than is supplied by the default values
for all these constants.
The option I chose here was to unconditionally expand the I/O ranges for
all arm64 systems. If you think this breaks existing systems/drivers, I
will have to look for other options.
David Daney
AFAICT, mapping an IO bar on arm64 just gives you back a VA into our
PCI_IOBASE region and the ioreadX accessors will just call the readX
macros, so there should be no need for further port adjustment.
Will
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