* Denys Vlasenko <dvlas...@redhat.com> wrote:
> >> arch/x86/math-emu/fpu_aux.c | 70 ++++++++++++++++++++++
> >> arch/x86/math-emu/fpu_entry.c | 49 +++++++++------
> >> arch/x86/math-emu/fpu_proto.h | 12 ++++
> >> arch/x86/math-emu/reg_compare.c | 128
> >> ++++++++++++++++++++++++++++++++++++++++
> >> 4 files changed, 241 insertions(+), 18 deletions(-)
> >
> > I wanted to apply this patch, but noticed the following problem: why are
> > two
> > instruction families added in a single patch?
>
> They were introduced at the same time in the CPU evolution
> (when CMOV feature was added).
>
> The idea is that there may be programs which assume that "cmov"
> in /proc/cpuinfo means both these insns are safe to use,
> which is true for all real CPUs.
I see, that makes sense - and this makes bisection of any bugs in the emulator
implementation harder.
Still, it cannot hurt I suppose.
Btw., has anyone explored the possibility to have an emulator 'runtime test' on
FPU-capable CPUs: to run in FPU emulation and to run the emulation code, but to
also run the real hardware instruction(s) against that context and double check
that the two FPU register sets match up, bit for bit?
If the emulator is perfect then the two would always match: the hardware
instruction generates the exact same result as software emulation.
This would slows down emulation a bit (but emulation is slow anyway due to trap
overhead), but makes it a lot more obvious that the emulator is correct.
It's not a trivial feature though I suspect, exceptions would have to be taken
care of, etc.
The motivation would be to make it much easier to extend the emulator, which
would
be useful to run modern Linux distros on future low-power x86 designs that have
no
FPU circuitry altogether.
Thanks,
Ingo
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