Davinci platforms may define a default queue for each channel
controller. If one is not defined, the default queue is set to EVENTQ_1.
However, there's no way to distinguish between an unset default queue to
one that is set to EVENTQ_0, as EVENTQ_0 = 0.

In order to keep existing behaviour on platforms which don't specify a
default_queue member, the default_queue member was modified to be a
pointer to enum dma_event_q. A NULL value means that this member was not
specified.

Signed-off-by: Ido Yariv <[email protected]>
---
 arch/arm/mach-davinci/dm365.c             |    4 +++-
 arch/arm/mach-davinci/dma.c               |    5 +++--
 arch/arm/mach-davinci/include/mach/edma.h |    2 +-
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 4604e72..b1cf08e 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -827,6 +827,8 @@ dm365_queue_priority_mapping[][2] = {
        {-1, -1},
 };
 
+static enum dma_event_q dm365_edma_cc0_default_queue = EVENTQ_3;
+
 static struct edma_soc_info edma_cc0_info = {
        .n_channel              = 64,
        .n_region               = 4,
@@ -835,7 +837,7 @@ static struct edma_soc_info edma_cc0_info = {
        .n_cc                   = 1,
        .queue_tc_mapping       = dm365_queue_tc_mapping,
        .queue_priority_mapping = dm365_queue_priority_mapping,
-       .default_queue          = EVENTQ_3,
+       .default_queue_ptr      = &dm365_edma_cc0_default_queue,
 };
 
 static struct edma_soc_info *dm365_edma_info[EDMA_MAX_CC] = {
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 6b96698..11c71e7 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -1449,8 +1449,9 @@ static int __init edma_probe(struct platform_device *pdev)
                edma_cc[j]->num_cc = min_t(unsigned, info[j]->n_cc,
                                                        EDMA_MAX_CC);
 
-               edma_cc[j]->default_queue = info[j]->default_queue;
-               if (!edma_cc[j]->default_queue)
+               if (info[j]->default_queue_ptr)
+                       edma_cc[j]->default_queue = *info[j]->default_queue_ptr;
+               else
                        edma_cc[j]->default_queue = EVENTQ_1;
 
                dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n",
diff --git a/arch/arm/mach-davinci/include/mach/edma.h 
b/arch/arm/mach-davinci/include/mach/edma.h
index 20c77f2..7f81812 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -250,7 +250,7 @@ struct edma_soc_info {
        unsigned        n_slot;
        unsigned        n_tc;
        unsigned        n_cc;
-       enum dma_event_q        default_queue;
+       enum dma_event_q        *default_queue_ptr;
 
        /* Resource reservation for other cores */
        struct edma_rsv_info    *rsv;
-- 
1.7.4.1

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