On 30 August 2012 14:18, Jaehoon Chung <[email protected]> wrote: > Hi Thomas, > > On 08/29/2012 07:48 PM, Thomas Abraham wrote: >> Some platforms allow for clock gating and control of bus interface unit clock >> and card interface unit clock. Add support for clock lookup of optional biu >> and ciu clocks for clock gating and clock speed determination. >> >> Signed-off-by: Abhilash Kesavan <[email protected]> >> Signed-off-by: Thomas Abraham <[email protected]> >> Acked-by: Will Newton <[email protected]> >> --- >> drivers/mmc/host/dw_mmc.c | 42 +++++++++++++++++++++++++++++++++++++++--- >> include/linux/mmc/dw_mmc.h | 4 ++++ >> 2 files changed, 43 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c >> index 227c42e..90c7c7b 100644 >> --- a/drivers/mmc/host/dw_mmc.c >> +++ b/drivers/mmc/host/dw_mmc.c >> @@ -1960,18 +1960,38 @@ int dw_mci_probe(struct dw_mci *host) >> return -ENODEV; >> } >> >> - if (!host->pdata->bus_hz) { >> + host->biu_clk = clk_get(host->dev, "biu"); >> + if (IS_ERR(host->biu_clk)) >> + dev_dbg(host->dev, "biu clock not available\n"); >> + else >> + clk_prepare_enable(host->biu_clk); > biu is clock for bus interface? > if didn't get "biu_clk" or didn't clk_prepare_enable(), then can we > initialize the card?
Hi Jaehoon, Yes, the biu clock is for bus interface. The biu and ciu clock lookup and enable here is optional in the above change. If a platform does not define these clocks, then the platform code is responsible for enabling these clocks. >> + >> + host->ciu_clk = clk_get(host->dev, "ciu"); >> + if (IS_ERR(host->ciu_clk)) >> + dev_dbg(host->dev, "ciu clock not available\n"); >> + else >> + clk_prepare_enable(host->ciu_clk); >> + >> + if (IS_ERR(host->ciu_clk)) >> + host->bus_hz = host->pdata->bus_hz; >> + else >> + host->bus_hz = clk_get_rate(host->ciu_clk); > if clk_get_rate() is incorrect value(ex,400MHz), > then mmc->f_min value is too high. > because mmc->f_min is assigned to DIV_ROUND_UP(host->bus_hz, 510) into > dw_mc_init_slot. > Do you have any opinion for solving this? One option on Exynos5250 is to use the clock divider in the CLKSEL register to divide the ciu clock to a lower value. For Exynos4, since there is no clock divider in CLKSEL register, the platform code should ensure that the ciu clock has a valid range. Thanks, Thomas. [...] -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
