On Wed, 2013-06-12 at 17:31 +0200, Arnd Bergmann wrote: > On Wednesday 12 June 2013, [email protected] wrote: > > +static int dw_mci_socfpga_setup_clock(struct dw_mci *host) > > +{ > > + struct dw_mci_socfpga_priv_data *priv = host->priv; > > + > > + clk_disable_unprepare(host->ciu_clk); > > + regmap_write(priv->sysreg, SYSMGR_SDMMCGRP_CTRL_OFFSET, > > + priv->hs_timing); > > + clk_prepare_enable(host->ciu_clk); > > + > > + host->bus_hz /= (priv->ciu_div + 1); > > + return 0; > > +} > > > Sorry for being so late in the game here, but why do you need a > regmap_write() call in the driver here? Shouldn't you just be able > to use the clk_set_rate() interface from the generic dw_mmc-pltfm > code?
This write is necessary for setting phase_shift(s) for the clocks that are feeding the CIU clock. Dinh > > Arnd > -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
