Enable hardware save-and-restore for the CORE and USBHOST powerdomains
during PM layer initialization. On OMAP3, this only affects the
USBTLL and USBHOST modules.
There is probably a sleep and wakeup latency penalty with these
enabled. No one seems to have quantified it yet. If the added
latency is measurable, an alternate approach would be to only enable
hardware save-and-restore if there are USB devices attached.
Signed-off-by: Paul Walmsley <[EMAIL PROTECTED]>
---
arch/arm/mach-omap2/pm34xx.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c7493f5..202c269 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -357,6 +357,10 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
pwrst->pwrdm = pwrdm;
pwrst->next_state = PWRDM_POWER_RET;
list_add(&pwrst->node, &pwrst_list);
+
+ if (pwrdm_has_hdwr_sar(pwrdm))
+ pwrdm_enable_hdwr_sar(pwrdm);
+
return set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
}
--
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