On Tue, 21 Oct 2008, Mans Rullgard wrote:

> Filling the set_rate and round_rate fields of dpll4_m4_ck makes
> this clock programmable through clk_set_rate().  This is needed
> to give omapfb control over the dss1_alwon_fck rate.
> 
> Signed-off-by: Mans Rullgard <[EMAIL PROTECTED]>

Acked-by: Paul Walmsley <[EMAIL PROTECTED]>

Måns, sorry this took so long, these two patches slipped through the 
cracks here.


- Paul

Reply via email to