* Tero Kristo <tero.kri...@nokia.com> [081211 07:59]:
> From: Paul Walmsley <p...@pwsan.com>
>
> Add a Non-cacheable Normal ARM executable memory type,
> MT_MEMORY_NONCACHED. This is needed for the OMAP3 SDRAM clock change
> code, which must run from SRAM. The SRAM must be marked as
> non-cacheable memory to avoid dirty cache line writebacks to SDRAM
> while the SDRAM controller is paused.
This should be discussed on LAKML.
Tony
> Signed-off-by: Paul Walmsley <p...@pwsan.com>
> ---
> arch/arm/include/asm/mach/map.h | 1 +
> arch/arm/mm/mmu.c | 23 +++++++++++++++++++++++
> 2 files changed, 24 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h
> index 39d949b..58cf91f 100644
> --- a/arch/arm/include/asm/mach/map.h
> +++ b/arch/arm/include/asm/mach/map.h
> @@ -26,6 +26,7 @@ struct map_desc {
> #define MT_HIGH_VECTORS 8
> #define MT_MEMORY 9
> #define MT_ROM 10
> +#define MT_MEMORY_NONCACHED 11
>
> #ifdef CONFIG_MMU
> extern void iotable_init(struct map_desc *, int);
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index 7f36c82..9ad6413 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -242,6 +242,10 @@ static struct mem_type mem_types[] = {
> .prot_sect = PMD_TYPE_SECT,
> .domain = DOMAIN_KERNEL,
> },
> + [MT_MEMORY_NONCACHED] = {
> + .prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
> + .domain = DOMAIN_KERNEL,
> + },
> };
>
> const struct mem_type *get_mem_type(unsigned int type)
> @@ -405,9 +409,28 @@ static void __init build_mem_type_table(void)
> kern_pgprot |= L_PTE_SHARED;
> vecs_pgprot |= L_PTE_SHARED;
> mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
> + mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
> #endif
> }
>
> + /*
> + * Non-cacheable Normal - intended for memory areas that must
> + * not cause cache line evictions when used
> + */
> + if (cpu_arch >= CPU_ARCH_ARMv6) {
> + if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
> + /* Non-cacheable Normal is XCB = 001 */
> + mem_types[MT_MEMORY_NONCACHED].prot_sect |=
> + PMD_SECT_BUFFERED;
> + } else {
> + /* For both ARMv6 and non-TEX-remapping ARMv7 */
> + mem_types[MT_MEMORY_NONCACHED].prot_sect |=
> + PMD_SECT_TEX(1);
> + }
> + } else {
> + mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_BUFFERABLE;
> + }
> +
> for (i = 0; i < 16; i++) {
> unsigned long v = pgprot_val(protection_map[i]);
> protection_map[i] = __pgprot(v | user_pgprot);
> --
> 1.5.4.3
>
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