On 13/03/14 10:58, Sathya Prakash M R wrote: > From: Tomi Valkeinen <[email protected]> > > On AM43xx, if a PLL is in bypass at kernel init, the code in > omap2_get_dpll_rate() will not realize this and will try to calculate > the clock rate using the multiplier and the divider, resulting in > errors. > > omap2_init_dpll_parent() has similar issue. > > Add the missing soc_is_am43xx() check to make the code work on AM43xx. > > Signed-off-by: Tomi Valkeinen <[email protected]>
I see you sent this already in December, and Paul asked for your signed-off for it, but you never replied. Tomi
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