On Mon, 24 Mar 2014, Sathya Prakash M R wrote:

> From: Tomi Valkeinen <tomi.valkei...@ti.com>
> 
> On AM43xx, if a PLL is in bypass at kernel init, the code in
> omap2_get_dpll_rate() will not realize this and will try to calculate
> the clock rate using the multiplier and the divider, resulting in
> errors.
> 
> omap2_init_dpll_parent() has similar issue.
> 
> Add the missing soc_is_am43xx() check to make the code work on AM43xx.
> 
> Signed-off-by: Tomi Valkeinen <tomi.valkei...@ti.com>
> Signed-off-by: Sathya Prakash M R <sath...@ti.com>

Thanks, queued for v3.15-rc.

- Paul
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