Hi Tomi. On Tue, 8 Apr 2014, Tomi Valkeinen wrote:
> On 24/03/14 13:01, Sathya Prakash M R wrote: > > From: Tomi Valkeinen <tomi.valkei...@ti.com> > > > > On AM43xx, if a PLL is in bypass at kernel init, the code in > > omap2_get_dpll_rate() will not realize this and will try to calculate > > the clock rate using the multiplier and the divider, resulting in > > errors. > > > > omap2_init_dpll_parent() has similar issue. > > > > Add the missing soc_is_am43xx() check to make the code work on AM43xx. > > > > Signed-off-by: Tomi Valkeinen <tomi.valkei...@ti.com> > > Signed-off-by: Sathya Prakash M R <sath...@ti.com> > > --- > > arch/arm/mach-omap2/clkt_dpll.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > Can you queue this for 3.15 fixes? Done. Thanks for pointing it out - I had missed the repost due to not being in the Cc:. - Paul -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
