* Javier Martinez Canillas <[email protected]> [140510 10:12]:
> Hello Pekon,
> 
> On Fri, May 9, 2014 at 10:46 PM, Pekon Gupta <[email protected]> wrote:
> > 1) NAND device memory is not directly accessible to CPU, its indirectly 
> > accessed
> >    via registers. So the 'reg' property for GPMC NAND nodes should be 
> > limited to
> >    address range of internal GPMC registers only.
> > 2) Also, minimum granularity of address space under a GPMC chip-select is 
> > 16MB
> >    so 'range' property for GPMC NAND node should specify 16MB as its 
> > memory-size
> 
> This is true for all SoC using the GPMC right? So we need to do the
> same modification for all OMAP boards to avoid mapping a bigger
> address space unnecessarily.

Yes we should fix them all up. See also the commenting standard I suggested
in the parallel NAND series.

Regards,

Tony
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