From: Tony Lindgren [mailto:[email protected]]
>* Gupta, Pekon <[email protected]> [140519 21:07]:
>> From: Tony Lindgren [mailto:[email protected]]
>> >* Pekon Gupta <[email protected]> [140519 02:16]:
>> >> Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on
>> >> am437x-gp-evm board.
>> >> (1) As NAND Flash data lines are muxed with eMMC, Thus at a given time
>> >> either
>> >> eMMC or NAND can be enabled. Selection between eMMC and NAND is
>> >> controlled:
>> >> (a) By dynamically driving following GPIO pin from software
>> >> SPI2_CS0(GPIO) == 0 NAND is selected (default)
>> >> SPI2_CS0(GPIO) == 1 eMMC is selected
>> >> (b) By statically using Jumper (J89) on the board
>> >
>> >So which MMC controller has eMMC then? How do we select which one we
>> >have enabled in the am437x-gp-evm.dts by default?
>> >
>> If there is no Jumper on the board, then driving SPI2_CS0 before device
>> probe decides the selection between NAND and eMMC. Therefore NAND
>> pin-mux also includes SPI2_CS0 and enables PULLDOWN on it to select NAND.
>
>So do they share lines outside omap, not inside omap?
>
>The reason I'm asking is I'm worried about the conflicting
>pinctrl settings if we try to use both. And I guess that's
>not an issue if the muxing of lines is done outside the
>omap?
>
Yes, the muxing is outside OMAP SoC, so if SPI2_CS0 is correctly
driven it will not allow contention on GPMC line (as per board design).
On am437x-gp-evm board, SPI2_CS0 is used to:
- route GPMC signals to selected device {eMMC | NAND}.
- keep the de-selected device {eMMC | NAND} in reset.
with regards, pekon
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