Hi,

Is there any update on this chain seeing this has been pending for a month now?

-Tero 

>-----Original Message-----
>From: [email protected] 
>[mailto:[email protected]] On Behalf Of ext 
>Woodruff, Richard
>Sent: 22 October, 2009 15:20
>To: Cousson, Benoit; Paul Walmsley; Nayak, Rajendra
>Cc: [email protected]
>Subject: RE: [PATCH] OMAP3: DVFS: No sdrc AC timing changes 
>during core dvfs
>
>Hi Beonit,
>
>> From: Cousson, Benoit
>> Sent: Thursday, October 22, 2009 3:59 AM
>> To: Woodruff, Richard; Paul Walmsley; Nayak, Rajendra
>
>> >It is not guaranteed safe to write actim registers on the 
>fly to an active
>> >part.  It is safe to do RFR as it is buffered and sent out 
>at a safe time.
>>
>> I think that what Paul is suggesting is to change the ACTIM 
>after ensuring
>> that the DDR is in self-refresh. In that case it is 
>perfectly valid; it is
>> just tricky to ensure that all initiators are in mute before 
>doing that.
>
>Yes that is true, however, ...
>
>That is not the way the code is setup and it's a long way from 
>that.  Run time pause of drivers is a minefield.
>
>With out a broad notifier they best you would hope for is some 
>opportunistic change time (against full system).  You wouldn't 
>have a guaranteed way to speed them up again where you need 
>them most at high opp.
>
>Some minimal kernel not using dma and the like could do it but 
>that is probably more misleading to put in the tree than 
>something useful for most.
>
>Regards,
>Richard W.
>
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