From: Pramod Gurav <[email protected]> 

The patch has the changes to calculate the dpll3 clock stabilization
delay dynamically. The SRAM delay is calibrated during bootup using the
gptimers and used while calculating the stabilization delay. By using
the dynamic method the dependency on the type of cache being used is
removed.

Formula to calculate the DVFS latency for 3430 and 3630 are different.
The second patch implements the formula for later.

This Version of patches adds optimisation to the formula implementation.

Teerth Reddy (1):
  OMAP3: SDRC: Dynamic Calculation of SDRC stall latency during DVFS
Pramod Gurav (1):
  OMAP3630 SDRC: Change in DVFS Latency Formula for OMAP3630

 arch/arm/mach-omap2/clkt34xx_dpll3m2.c |   71 +++++++++++++++++++++++++++-----
 arch/arm/mach-omap2/clock34xx.h        |    2 +
 arch/arm/mach-omap2/clock3xxx.c        |    2 +-
 arch/arm/mach-omap2/clock3xxx.h        |    1 +
 arch/arm/mach-omap2/clock3xxx_data.c   |   13 ++++++
 arch/arm/mach-omap2/sram34xx.S         |    8 ++++
 arch/arm/plat-omap/include/plat/sram.h |    4 ++
 arch/arm/plat-omap/sram.c              |   51 +++++++++++++++++++++++
 8 files changed, 140 insertions(+), 12 deletions(-)

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