On Thu, Sep 02, 2010 at 10:21:33AM -0700, Tony Lindgren wrote: > * Russell King - ARM Linux <[email protected]> [100902 09:50]: > > On Thu, Sep 02, 2010 at 09:22:20AM -0700, Tony Lindgren wrote: > > > >From 8b22546af2ba9a0d96c2f419bfcec1f3c01a414d Mon Sep 17 00:00:00 2001 > > > From: Tony Lindgren <[email protected]> > > > Date: Mon, 30 Aug 2010 14:03:28 -0700 > > > Subject: [PATCH 5/6] ARM: Don't set TLB ops broadcasting on UP ARMv7 > > > > > > Don't set TLB ops broadcasting on UP ARMv7. Looks like these bits > > > are also different on A8 and A9. > > > > This is already taken care of. > > > > > diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S > > > index 07fc660..51a063d 100644 > > > --- a/arch/arm/mm/proc-v7.S > > > +++ b/arch/arm/mm/proc-v7.S > > > @@ -191,7 +191,8 @@ __v7_setup: > > > UP(mov r0, #(1 << 6)) @ fake it for UP > > > > If it's UP, we set r0 to 1 << 6, which... > > > > > tst r0, #(1 << 6) @ SMP/nAMP mode enabled? > > > > means this test produces a non-zero result. > > > > > orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and > > > - mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting > > > > And therefore these instructions will not be executed. > > AFAIK these bits are different for Cortex-A8 and A9, bit 6 is IBE on A8.
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