* Russell King - ARM Linux <[email protected]> [110620 02:50]:
> On Mon, Jun 20, 2011 at 02:23:28AM -0700, Tony Lindgren wrote:
> >  void __init gic_init_irq(void)
> >  {
> > -   void __iomem *gic_cpu_base;
> > -
> >     /* Static mapping, never released */
> >     gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
> >     BUG_ON(!gic_dist_base_addr);
> >  
> >     /* Static mapping, never released */
> > -   gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
> > -   BUG_ON(!gic_cpu_base);
> > +   omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
> > +   BUG_ON(!omap_irq_base);
> >  
> > -   gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
> > +   gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
> 
> Why do you change this?  Nothing should be using 'omap_irq_base' directly
> because it doesn't know what type of interrupt controller you have.

We need to set omap_irq_base for entry-macro.S for the MULTI_OMAP2 case.
So no need to have separate gic_cpu_base for gic_init_irq.
 
> The GIC IRQ entry code should be using gic_cpu_base_addr provided by the
> common gic driver rather than anything else.

You mean for get_irqnr_and_base? That is the case when we don't
have omap2 or 3 compiled in with omap4. For the multi-omap case
we are using omap_irq_base for get_irqnr_and_base as we need to
handle two different kind of irq controllers.

Regards,

Tony
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