On Thu, May 10, 2012 at 11:29:19AM -0600, Paul Walmsley wrote: > During kernel init, the AM3505/AM3517 UART4 cannot complete its softreset: > > omap_hwmod: uart4: softreset failed (waited 10000 usec) > > This also results in another warning later in the boot process: > > omap_hwmod: uart4: enabled state can only be entered from initialized, idle, > or disabled state > > >From empirical observation, the AM35xx UART4 IP block requires either > uart1_fck or uart2_fck to be enabled while UART4 resets. Otherwise > the reset will never complete. So this patch adds uart1_fck as an > optional clock for UART4 and adds the appropriate hwmod flag to cause > uart1_fck to be enabled during the reset process. (The choice of > uart1_fck over uart2_fck was arbitrary.) > > Unfortunately this observation raises many questions. Is it necessary > for uart1_fck or uart2_fck to be controlled with uart4_fck for the > UART4 to work correctly? What exactly do the AM35xx UART4 clock > tree and the related PRCM idle management FSMs look like? If anyone > has the ability to answer these questions through empirical functional > testing, or hardware information from the AM35xx designers, it would > be greatly appreciated. > > Cc: Benoît Cousson <[email protected]> > Cc: Kyle Manna <[email protected]> > Cc: Mark A. Greer <[email protected]> > Cc: Ranjith Lohithakshan <[email protected]> > Signed-off-by: Paul Walmsley <[email protected]>
Acked-by: Mark A. Greer <[email protected]> (on an am3517evm) Mark -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
