Santosh Shilimkar <[email protected]> writes: > On Thursday 08 August 2013 02:16 PM, Kevin Hilman wrote: >> Dave Gerlach <[email protected]> writes: >> >>> From: Vaibhav Bedia <[email protected]> >>> >>> SDRAM controller on AM33XX requires that a modification of certain >>> bit-fields in PWR_MGMT_CTRL register (ref. section 7.3.5.13 in >>> AM335x-Rev H) is followed by a dummy read access to SDRAM. This >>> scenario arises when entering a low power state like DeepSleep. >>> To ensure that the read is not from a cached region we reserve >>> some memory during bootup using the arm_memblock_steal() API. >> >> Hmm, sounds to me an awful lot like the existing omap_bus_sync() ? >> > All the credit of that awful omap_bus_sync() goes to me since > I introduced it. And I keep beating the hardware guys > who have not left a choice but to introduce the ugly work > around in software. ;-)
Agreed, but what's even more awful than the current version is duplicating it in a slightly different way using yet another whole page mapping for a single read/write location. Kevin -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
