Thanks for the answer Andi.
On a more general sense, how one can link perf events (as reported by
perf list) to hardware documentation ? Is there some document explaining
that or should I dig into the perf code source code in the Linux kernel ?
Manu
On 07/02/2013 05:55 AM, Andi Kleen wrote:
Manuel Selva<manuel.se...@insa-lyon.fr> writes:
My question is about the link between events reported in Intel
documentation and events listed by perf list. Is the perf list
cache-misses event the same than the one mentioned as Last-level cache
missesin Intel documentation ?
Yes it is
(at least currently, perf events are not particularly well defined
and have changed in the past. However this one is proably not likely
to change)
-Andi
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