> T4 EQ entries are in multiples of 64B. Currently the RDMA SQ and RQ > use fixed sized entries composed of 4 EQ entries for the SQ and 2 EQ > entries for the RQ. For optimial latency with small IO, we need to > change this so the HW only needs to DMA the EQ entries actually used by > a given work request.
This seems not to be a fix, just an optimization -- so at this point for 2.6.36 I think. Or am I wrong? -- Roland Dreier <[email protected]> || For corporate legal information go to: http://www.cisco.com/web/about/doing_business/legal/cri/index.html -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
