> As the sdhi0 MSTP clock is still enabled, there must be an unknown clock > that's > needed for proper operation, but that's currently not controlled by software.
I'd guess the SCC needs a seperate clock?
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> As the sdhi0 MSTP clock is still enabled, there must be an unknown clock > that's > needed for proper operation, but that's currently not controlled by software.
I'd guess the SCC needs a seperate clock?
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