From: Biju Das <[email protected]> Define the r8a7745 generic part of the USB PHY device node.
Signed-off-by: Biju Das <[email protected]> Signed-off-by: Chris Paterson <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]> --- arch/arm/boot/dts/r8a7745.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index b4e9536a84d6..17cfa53f3c76 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -891,6 +891,28 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; }; + + usbphy: usb-phy@e6590100 { + compatible = "renesas,usb-phy-r8a7745", + "renesas,rcar-gen2-usb-phy"; + reg = <0 0xe6590100 0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cpg CPG_MOD 704>; + clock-names = "usbhs"; + power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; + resets = <&cpg 704>; + status = "disabled"; + + usb0: usb-channel@0 { + reg = <0>; + #phy-cells = <1>; + }; + usb2: usb-channel@2 { + reg = <2>; + #phy-cells = <1>; + }; + }; }; /* External root clock */ -- 2.11.0
