From: Magnus Damm <[email protected]> Drive the NOR flash chips via SPI bitbang instead of via the two channels of QSPI hardware. This is useful to test the on-chip GPIO devices.
Not-Yet-Signed-off-by: Magnus Damm <[email protected]> --- arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 36 ++++++++++++++++++++++++ 1 file changed, 36 insertions(+) --- 0002/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ work/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts 2018-01-19 03:47:16.380607110 +0900 @@ -31,6 +31,42 @@ /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; + + spi_flash@0 { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&gpio5 0 0>; + gpio-mosi = <&gpio5 1 0>; + gpio-miso = <&gpio5 2 0>; + cs-gpios = <&gpio5 5 0>; + num-chipselects = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + }; + }; + + spi_flash@1 { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&gpio5 6 0>; + gpio-mosi = <&gpio5 7 0>; + gpio-miso = <&gpio5 8 0>; + cs-gpios = <&gpio5 11 0>; + num-chipselects = <1>; + + flash@1 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + }; + }; }; &avb {
