From: Magnus Damm <[email protected]> Add DT nodes for the PFC on the r8a77970 SoC and hook up the SCIF console to make use of the PFC to configure the pins.
Signed-off-by: Magnus Damm <[email protected]> --- Depends on r8a77970 PFC support - included in latest renesas-drivers arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 10 ++++++++++ arch/arm64/boot/dts/renesas/r8a77970.dtsi | 5 +++++ 2 files changed, 15 insertions(+) --- 0001/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +++ work/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts 2018-01-19 03:43:18.050607110 +0900 @@ -52,11 +52,21 @@ clock-frequency = <32768>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; +}; + &rwdt { timeout-sec = <60>; status = "okay"; }; &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; --- 0001/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ work/arch/arm64/boot/dts/renesas/r8a77970.dtsi 2018-01-19 03:43:36.990607110 +0900 @@ -117,6 +117,11 @@ reg = <0 0xe6160000 0 0x200>; }; + pfc: pin-controller@e6060000 { + compatible = "renesas,pfc-r8a77970"; + reg = <0 0xe6060000 0 0x504>; + }; + sysc: system-controller@e6180000 { compatible = "renesas,r8a77970-sysc"; reg = <0 0xe6180000 0 0x440>;
