From: Geert Uytterhoeven <[email protected]> According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware User's Manual rev. 3.00, the realtime clock interrupts are level not edge interrupts.
Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]> --- arch/arm/boot/dts/r7s72100.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index c7b3dca6d81c..eb2e6f95a2e8 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -682,9 +682,9 @@ rtc: rtc@fcff1000 { compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc"; reg = <0xfcff1000 0x2e>; - interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING - GIC_SPI 277 IRQ_TYPE_EDGE_RISING - GIC_SPI 278 IRQ_TYPE_EDGE_RISING>; + interrupts = <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "alarm", "period", "carry"; clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>, <&rtc_x3_clk>, <&extal_clk>; -- 2.11.0
