[PATCH 58/69] ARM: dts: r7s72100: Correct watchdog timer interrupt type

[Simon Horman]

From: Geert Uytterhoeven <geert+rene...@glider.be>

According to table 7.3 ("List of Interrupt IDs") in the RZ/A1H Hardware
User's Manual rev. 3.00, the watchdog timer interrupt is a level
interrupt.

Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm/boot/dts/r7s72100.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 4a1aade0e751..c7b3dca6d81c 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -387,7 +387,7 @@
                wdt: watchdog@fcfe0000 {
                        compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
                        reg = <0xfcfe0000 0x6>;
-                       interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
+                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&p0_clk>;
                };
 
-- 
2.11.0