On Friday, September 14, 2018, Geert Uytterhoeven wrote:
> > Just FYI, for the heck of it, I tried and hacked in registering the
> > clock driver using CLK_OF_DECLARE since that happens before the
> > TIMER_OF_DECLARE timers are probed.
> >
> > But, I got this result:
> >
> > [ 0.000000] Driver 'renesas-cpg-mssr' was unable to register with
> bus_type 'platform' because the bus was not initialized.
>
> Indeed, you cannot register a platform device from CLK_OF_DECLARE().
> Instead, you have to operate on the passed struct device_node pointer,
> cfr. the old RZ/A1 clock driver.
How about this proposal:
I leave the current OSTM timer driver as it is today with
TIMER_OF_DECLARE.
But, I modify the clock driver so it registers a mini driver with
CLK_OF_DECLARE that can enable individual HW module clocks using
clk_register_fixed_rate. Once those modules/clocks are enabled, they are
enabled
forever.
Also, later on when the full platform driver is probed, for any of those
early clocks that were created, it basically ignores them.
To use this early clock, you add this to your board's .dts file as such:
/* Special Early CPG clocks */
/ {
cpg_early: clock-controller@early {
#clock-cells = <2>;
compatible = "renesas,r7s9210-cpg-mssr-early";
};
};
/* High resolution System tick timers */
&ostm0 {
status = "okay";
clocks = <&cpg_early CPG_MOD 36>; /* replace .dtsi setting */
power-domains = <&cpg_early>; /* replace .dtsi setting */
};
&ostm1 {
status = "okay";
clocks = <&cpg_early CPG_MOD 35>; /* replace .dtsi setting */
power-domains = <&cpg_early>; /* replace .dtsi setting */
};
I've coded this up and it works fine.
Note that instead of duplicating DT node entries, the driver simply
references the full "renesas,r7s9210-cpg-mssr" node for things such as
parent clock and register location.
Chris
